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  mos integrated circuit pd3753 2088 pixels ccd linear image sensor with peripheral circuit data sheet document no. s16546ej2v0ds00 (2nd edition) date published february 2006 ns cp (n) printed in japan the mark shows major revised points. the revised points can be easily searched by copying an "" in the pdf file and specifying it in the "find what:" field. the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. 1994 description the pd3753 is a 2088-pixel high sensitivity ccd (charge coup led device) linear image sensor which changes optical images to electrical signal. the pd3753 consists of 2088-pixels photocell array and a li ne of 2088-pixel ccd charge transferred register. it contains a reset a feed-through level clamp circuit, a reset pulse generator, a clamp pulse generator, and a voltage amplifier to provide high sensitivity and low noise. it also supports low power consumption with single 5 v power supply. the pd3753 can be driven by power supply and three input clocks owing to the on-chip reset pulse generator and a clamp pulse generator. features ? valid photocell : 2088 pixels ? photocell pitch : 14 m ? peak response wavelength : 550 nm (green) ? resolution : 8 dot/mm b4 (257 364 mm) size (shorter side) ? high response sensitivity ? low noise ? drive clock level : cmos output under +5 v operation ? data rate : 2 mhz max. ? power supply : +5 v ? on-chip circuits : reset feed-through level clamp circuit reset pulse generator clamp pulse generator voltage amplifier ordering information part number package pd3753cy-a ccd linear image sensor 22-pin plastic dip (10.16 mm (400)) remark the pd3753cy-a is a lead-free product.
data sheet s16546ej2v0ds 2 pd3753 block diagram 3 19 20 14 9 15 optical black 18 pixels, invalid photocell 2 pixels, valid photocell 2088 pixels, invalid photocell 2 pixels ccd register v od v out agnd 13 dgnd 2 tg 1 reset feed-through level clamp circuit voltage amplifier reset pulse/ clamp pulse generator
data sheet s16546ej2v0ds 3 pd3753 pin configuration (top view) ccd linear image sensor 22-pin plastic dip (10.16 mm (400)) ? pd3753cy-a agnd 122 221 320 419 518 617 716 815 914 10 13 11 12 no connection no connection output shift register clock 1 no connection no connection no connection no connection no connection no connection transfer gate clock no connection nc output drain voltage v od nc no connection nc no connection nc nc nc no connection nc nc no connection nc tg nc nc no connection nc nc digital ground no connection nc dgnd v out nc analog ground 1 shift register clock 2 2 caution connect the no connection pins (nc) to gnd. photocell structure diagram 14 m m 2 m 12 channel stopper aluminum shield
data sheet s16546ej2v0ds 4 pd3753 absolute maximum ratings (t a = + 25 c) parameter symbol ratings unit output drain voltage v od ? 0.3 to + 8 v shift register clock voltage v 1 , v 2 ? 0.3 to + 8 v transfer gate clock voltage v tg ? 0.3 to + 8 v operating ambient temperature note t a ? 25 to + 60 c storage temperature t stg ? 40 to + 70 c note use at the condition without dew condensation. caution product quality may suffer if the absolute m aximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefor e the product must be used under conditions that ensure that the absolute maxi mum ratings are not exceeded. recommended operating conditions (t a = + 25 c) parameter symbol min. typ. max. unit output drain voltage v od 4.7 5.0 5.3 v shift register clock high level v 1_h , v 2_h 4.5 5.0 v od + 0.2 v shift register clock low level v 1_l , v 2_l ? 0.3 0 + 0.5 v transfer gate clock high level v tgh 4.5 v 1_h note v 1_h note v transfer gate clock low level v tgl ? 0.3 0 + 0.5 v data rate f r 0.2 1 2 mhz note when transfer gate clock high level (v tgh ) is higher than shift register clock high level (v 1_h ), image lag can increase.
data sheet s16546ej2v0ds 5 pd3753 electrical characteristics t a = + 25 c, v od = 5 v, f 1 = 1 mhz, data rate = 1 mhz, storage time = 10 ms, input signal clock = 5 v p-p , light source : 3200 k halogen lamp + c500 (infrared cut filter) parameter symbol test conditions min. typ. max. unit saturation voltage v sat 1.0 1.2 ? v saturation exposure se daylight color fluorescent lamp ? 0.013 ? lx?s photo response non-uniformity prnu v out = 500 mv ? 2 8 % average dark signal ads light shielding ? 1.0 8.0 mv dark signal non-uniformit y dsnu light shielding ? 8 4 + 8 mv power consumption p w ? 30 50 mw output impedance z o ? 0.5 1 k ? response r f daylight color fluorescent lamp 63 90 117 v/lxs response peak ? 550 ? nm image lag il v out = 1.0 v ? 7 14 % offset level note v os 2.5 3.0 3.5 v output fall delay time note t d v out = 500 mv, t1, t2 = 50 ns ? 130 ? ns total transfer efficiency tte v out = 1.0 v, data rate = 2 mhz 92 98 ? % dynamic range dr v sat /dsnu ? 375 ? times reset feed-through noise note rftn light shielding 0 800 1500 mv bit noise bn light shielding ? 10 ? mv p-p resolution mtf modulation transfer function at ? 65 ? % nyquist frequency note refer to timing chart 2 . remark when v od = 4.7 v, the response typically decreases to 90% of the value under 5 v operation. input pin capacitance (t a = + 25 c, v od = 5 v) parameter symbol pin name pin no. min. typ. max. unit shift register clock pin capacitance 1 c 1 1 14 ? 300 ? pf shift register clock pin capacitance 2 c 2 2 15 ? 300 ? pf transfer gate clock pin capacitance c tg tg 9 ? 100 ? pf
data sheet s16546ej2v0ds 6 pd3753 timing chart 1 1 2 3 4 5 12 13 14 15 16 31 32 33 34 35 36 37 2118 2119 2120 2121 2122 2123 2124 tg 1 2 v out optical black (18 pixels) v out unstable period * (12 pixels) valid photocell (2088 pixels) invalid photocell (2 pixels) invalid photocell (2 pixels) caution be sure not to use this period (indicated by *) as the black level, because this part is unstable. timing chart 2 90% t1 90% 10% 10% 1 2 v out 10% t2 t d remark : signal output symbol min. typ. max. unit t1, t2 0 50 (100) ns remark the max. in the table above shows the operation r ange in which the output c haracteristics are kept almost enough for general purpose, does not show the limit above which the pd3753 is destroyed.
data sheet s16546ej2v0ds 7 pd3753 tg, 1, 2 timing chart 90% t3 t4 t5 t6 t7 10% 1 2 tg 90% symbol min. typ. max. unit t3, t4 0 50 ? ns t5 650 1000 (2000) ns t6, t7 0 100 ? ns remark the max. in the table above shows the operation r ange in which the output c haracteristics are kept almost enough for general purpose, does not show the limit above which the pd3753 is destroyed. 1, 2 cross points 1 2 2.0 v or more 2.0 v or more remark adjust cross points 1, 2 with input resistance of each pin.
data sheet s16546ej2v0ds 8 pd3753 definitions of characteristic items 1. saturation voltage : v sat output signal voltage at whic h the response linearity is lost. 2. saturation exposure : se product of intensity of illumination (lx) and storag e time (s) when saturation of output voltage occurs. 3. photo response non-uniformity : prnu the peak/bottom ratio to the average output voltage of all the valid pixels calculated by the following formula. prnu (%) = v max. or v min. n : number of valid pixcels v j : output voltage of each pixel j = 1 n n 1 v j 100 ? 1 v min. v max. register dark dc level j = 1 n n 1 v j 4. average dark signal : ads average output signal voltage of all the valid pixels at light shielding. this is calculated by the following formula. ads (mv) = d j : dark signal of valid pixel number j 2088 j = 1 2088 d j 5. dark signal non-uniformity : dsnu the difference between ads and voltage of the highest or lowest output pixel of all the valid pixels at light shielding. ads dsnu max. dsnu min. register dark dc level v out
data sheet s16546ej2v0ds 9 pd3753 6. output impedance : z o impedance of the output pins viewed from outside. 7. response : r output voltage divided by exposure (lxs). note that the response varies with a light source (spectral characteristic). 8. image lag : il the rate between the last output voltage and the next one after read out the data of a line. v out tg light v out on off v 1 il (%) = v 1 v out 100 9. bit noise : bn output signal distribution of a photocell by scan.
data sheet s16546ej2v0ds 10 pd3753 standard characteristic curves (reference value) dark output temperature characteristic storage time output voltage characteristic (t a = +25 c) operating ambient temperature t a ( c) storage time (ms) 8 4 2 1 0.5 0.25 0.1 10 0 20304050 relative output voltage relative output voltage 2 1 0.2 0.1 1510 total spectral response characteristics (without infrared cut filter) (t a = +25 c) 1200 600 400 1000 800 0 20 40 60 80 100 wavelength (nm) response ratio (%)
data sheet s16546ej2v0ds 11 pd3753 4.5 0 90 100 110 4.7 5.0 5.3 5.5 response ratio (%) power supply voltage response ratio characteristic power supply voltage (v)
data sheet s16546ej2v0ds 12 pd3753 application circuit example + tg 2 1 +5 v +5 v pd3753cy 10 f/16 v 10 ? 10 ? 47 ? 100 ? 100 ? 2.2 k ? 2sa1005 74hc04 47 ? v out agnd 122 221 320 4 19 518 617 716 815 914 10 13 11 12 nc v od nc nc nc nc nc nc nc nc tg nc nc nc dgnd nc nc v out nc 1 2 0.1 f + 10 f/16 v 0.1 f caution connect the no connection pins (nc) to gnd.
data sheet s16546ej2v0ds 13 pd3753 package drawing ccd linear image sensor 22-pin plastic dip (10.16 mm (400) ) pd3753cy 44.0 0.3 37.5 1st valid pixel 1.7 0.3 1 9.25 0.3 2.0 0.25 0.05 10.16 0.2 0.46 0.1 2.54 0.25 1.02 0.15 (5.42) 4.21 0.5 4.39 0.4 12 11 2.35 0.2 3 (1.99) 2 name dimensions refractive index plastic cap 42.9 8.35 0.7 1.5 1 1st valid pixel the center of the pin1 2 the surface of the ccd chip the top of the cap 3 the bottom of the package the surface of the ccd chip 22c-1ccd-pkg15-1 (unit : mm) 1 22 10.16 + 0.7 ? 0.2
data sheet s16546ej2v0ds 14 pd3753 recommended soldering conditions when soldering this product, it is highly recommended to observe the conditions as shown below. if other soldering processes are used, or if the soldering is performed under different conditions, please make sure to consult with our sales offices. type of through-hole device pd3753cy-a : ccd linear image sensor 22-pin plastic dip (10.16 mm (400)) process conditions partial heating method pin temperature : 300 c or below, heat time : 3 seconds or less (per pin) cautions 1. during assembly care should be taken to pr event solder or flux from contacting the plastic cap. the optical characteristics coul d be degraded by such contact. 2. soldering by the solder flow method may have deleterious effects on prevention of plastic cap soiling and heat resistance. so the method cannot be guaranteed.
data sheet s16546ej2v0ds 15 pd3753 notes on handling the packages cleaning the plastic cap dust and dirt protecting mounting of the package operate and storage environments ethyl alcohol methyl alcohol isopropyl alcohol n-methyl pyrrolidone etoh meoh ipa nmp the optical characteristics of the ccd will be degraded if the cap is scratched during cleaning. don?t either touch plastic cap surface by hand or have any object come in contact with plastic cap surface. should dirt stick to a plastic cap surface, blow it off with an air blower. for dirt stuck through electricity ionized air is recommended. and if the plastic cap surface is grease stained, clean with our recommended solvents. care should be taken when cleaning the surface to prevent scratches. we recommend cleaning the cap with a soft cloth moistened with one of the recommended solvents below. excessive pressure should not be applied to the cap during cleaning. if the cap requires multiple cleanings it is recommended that a clean surface or cloth be used. the following are the recommended solvents for cleaning the ccd plastic cap. use of solvents other than these could result in optical or physical degradation in the plastic cap. please consult your sales office when considering an alternative solvent. the application of an excessive load to the package may cause the package to warp or break, or cause chips to come off internally. particular care should be taken when mounting the package on the circuit board. don't have any object come in contact with plastic cap. you should not reform the lead frame. we recommended to use a ic-inserter when you assemble to pcb. also, be care that the any of the following can cause the package to crack or dust to be generated. 1. applying heat to the external leads for an extended period of time with soldering iron. 2. applying repetitive bending stress to the external leads. 3. rapid cooling or heating operate in clean environments. ccd image sensors are precise optical equipment that should not be subject to mechanical shocks. exposure to high temperatures or humidity will affect the characteristics. so avoid storage or usage in such conditions. keep in a case to protect from dust and dirt. dew condensation may occur on ccd image sensors when the devices are transported from a low-temperature environment to a high-temperature environment. avoid such rapid temperature changes. for more details, refer to our document "review of quality and reliability handbook" (c12769e) 1 2 electrostatic breakdown ccd image sensor is protected against static electricity, but destruction due to static electricity is sometimes detected. before handling be sure to take the following protective measures. 1. ground the tools such as soldering iron, radio cutting pliers of or pincer. 2. install a conductive mat or on the floor or working table to prevent the generation of static electricity. 3. either handle bare handed or use non-chargeable gloves, clothes or material. 4. ionized air is recommended for discharge when handling ccd image sensor. 5. for the shipment of mounted substrates, use box treated for prevention of static charges. 6. anyone who is handling ccd image sensors, mounting them on pcbs or testing or inspecting pcbs on which ccd image sensors have been mounted must wear anti-static bands such as wrist straps and ankle straps which are grounded via a series resistance connection of about 1 m ? . 4 3 recommended solvents solvents symbol
data sheet s16546ej2v0ds 16 pd3753 [memo]
data sheet s16546ej2v0ds 17 pd3753 [memo]
data sheet s16546ej2v0ds 18 pd3753 [memo]
data sheet s16546ej2v0ds 19 pd3753 1 2 3 4 voltage application waveform at input pin waveform distortion due to input noise or a reflected wave may cause malfunction. if the input of the cmos device stays in the area between v il (max) and v ih (min) due to noise, etc., the device may malfunction. take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between v il (max) and v ih (min). handling of unused input pins unconnected cmos device inputs can be cause of malfunction. if an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd via a resistor if there is a possibility that it will be an output pin. all handling related to unused pins must be judged separately for each device and according to related specifications governing the device. precaution against esd a strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. environmental control must be adequate. when it is dry, a humidifier should be used. it is recommended to avoid using insulators that easily build up static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work benches and floors should be grounded. the operator should be grounded using a wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with mounted semiconductor devices. status before initialization power-on does not necessarily define the initial status of a mos device. immediately after the power source is turned on, devices with reset functions have not yet been initialized. hence, power-on does not guarantee output pin levels, i/o settings or contents of registers. a device is not initialized until the reset signal is received. a reset operation must be executed immediately after power-on for devices with reset functions. power on/off sequence in the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. when switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. the correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. input of signal during power off state do not input signals or an i/o pull-up power supply while the device is not powered. the current injection that results from input of such a signal or i/o pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. notes for cmos devices 5 6
pd3753 the information in this document is current as of february, 2006. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. the quality grade of nec e lectronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) ? ? ? ? ? ? m8e 02. 11-1 (1) (2) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. "standard": "special": "specific":


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